Job Title: Silicon DD Engineer IV Job Location: Redmond, WA / Sunnyvale, CA Job Duration: 12 Months potential for extension Role: Develop and test RTL modules on AMD/Xilinx FPGA devices (required) and ASIC targets (preferred) Develop and maintain build/simulation scripts Write test cases using Python to validate our design Create software interfaces from our FPGA-based systems to Windows and Linux systems software at the HAL layer Collaborate in a team environment across multiple engineering disciplines and with researchers Skills Minimum: 5+ years of FPGA design experience using Verilog, SystemVerilog 5+ years of experience in AMD/Xilinx FPGA design (Versal and Kintex/Virtex UltraScale+ desired, 7-series minimum) Experience using industry standard Xilinx Vivado to bring up initial system, integrate peripheral components, and test and debug design Programming experience in one or more scripting languages: Python, tcl, shell scripts, or equivalent EDA tool scripting languages Preferred: 10+ years of experience in FPGA design and development Experience with RTL to GDS flows on modern processes like TSMC N7 Experience with serial interfaces like SPI, I2C and video/camera interfaces like MIPI DSI/CSI Proven track record of successfully deploying FPGA solutions across production systems or research prototypes Programming experience in C and/or C++ Experience developing accompanying firmware to exercise and drive FPGA prototypes Education: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience