Silicon DD Engineer IV, Redmond

Silicon DD Engineer IV

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Job Title: Silicon Digital Design Engineer IV
Location: Onsite - Redmond, WA (Sunnyvale, CA optional)
Duration: 12 months (with potential for extension)
Travel Required: No
Team Size: 5
Work Type: R&D, Prototyping, and Product Development

Job Description:
We are seeking a highly skilled and experienced Silicon Digital Design Engineer IV to contribute to the development of cutting-edge FPGA-based systems and ASIC designs for custom camera and video interfaces. This role involves hands-on RTL design, microarchitecture development, SoC integration, simulation, and verification. The engineer will play a key role in building and validating high-performance silicon prototypes that support Meta's next-generation imaging technologies.

Key Responsibilities:
Design, develop, and verify RTL modules using SystemVerilog/Verilog
Define and implement microarchitectures for digital subsystems
Perform FPGA prototyping and bring-up using Xilinx tools (Vivado)
Integrate IPs and support SoC-level integration and chip-level verification
Write and maintain Python/TCL scripts for test automation and simulation
Collaborate with cross-functional teams in hardware, validation, and algorithm development
Support the RTL-to-GDS flow, including synthesis, timing closure, and post-layout verification
Assist with algorithm validation, camera/video interface testing, and test case development
Troubleshoot and debug silicon issues throughout the chip lifecycle

Minimum Qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science
5+ years of experience in:
RTL coding, synthesis, and SoC integration
FPGA development on AMD/Xilinx platforms (Versal, Kintex, UltraScale+)
Digital design microarchitecture
FPGA verification and simulation
Proficient in scripting (Python, TCL, shell)
Familiar with industry-standard interfaces like SPI, I2C, and MIPI DSI/CSI

Preferred Qualifications:
Master's degree in a relevant field
Experience with ASIC design flows, including RTL-to-GDS
Hands-on knowledge of high-speed protocols (PCIe, USB)
C/C++ programming for firmware interaction (bonus)
Proven experience delivering FPGA or ASIC prototypes in production or research

Soft Skills:
Self-starter with ability to work independently in a small, innovative team
Strong problem-solving and debugging skills
Comfortable working in a research-driven environment with iterative ideas

EEO:

"Mindlance is an Equal Opportunity Employer and does not discriminate in employment on the basis of - Minority/Gender/Disability/Religion/LGBTQI/Age/Veterans."

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Location:: Redmond

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