Senior Physical Design Engineer - 1999762
13 Days Old
- Manage the physical implementation of low power systems-on-a-chip, starting from RTL to tape out quality databases
- Lead physical design flow including synthesis, LEC, timing, IR drop, formal, PNR, and ECO
- Manage outsource external design services companies as needed by project schedules
- Currently based on Cadence tools
Requirements:
- Track record of leading physical design on multiple projects
- Proficient in scripting and automation
- BS or MS (preferred) degree in EE with 10+ years of relevant physical design experience
Nice to Have:
- Significant experience with low power design.
- Familiar with creating UPF and/or CPF and leveraging them throughout the design flow
- Experience with Cadence Foundation Flow
Location:
- Irvine, California, USA
- Campbell (Silicon Valley), California, USA
- Location:
- Irvine