Successful candidates will work as part of a team on projects which may include: Validating and Characterizing PMA (or PHY) blocks of transceivers Development of RTL test designs and firmware to validate transceivers Development of automated testing environment and test scenarios, Research and development of performance analysis tools, including data processing, results/metrics analysis and management, Ensuring transceiver meets electrical compliance requirements for protocols such as PCIe, Ethernet Working on the cutting-edge Adaptive Compute Acceleration Platform (ACAP) and devices Job Qualifications Requires BS w/ 2+ yrs in Electrical Engineering, Computer Engineering or related equivalent Hands-on experience with high-speed scopes, pattern generators, VNA and associated lab equipment for SERDES testing Experienced in C++/Verilog/FPGA design Experienced in Python and automation techniques A strong passion for technologies and a willingness to jump in and share findings A team player with strong written and verbal skills

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