Our customer is seeking an experienced execution Senior Digital ASIC Design Engineer who thrives in a fast-paced, dynamic environment, delivering advanced technical solutions in support of critical mission needs. A Senior ASIC Hardware Engineer specifies, designs, verifies, tests, and documents Application-Specific Integrated Circuits. The engineer develops the architecture, designs circuits and/or HDL, performs simulations, performs physical layout, verifies and tests designs. Job Description: Duties/Responsibilities Design and simulate circuits at the transistor level to implement the architecture to meet the required specifications. Contribute to system-level design Optimize hardware designs for performance, power, and cost Evaluate the hardware feasibility of complex algorithms and requirements Independently contribute to complex chip architectures and designs Independently drive solutions to complex problems – develop requirements, propose ways forward when customer requirements are unclear or incomplete, and adapt appropriately to changes in requirements Contribute to business development and proposal activities Develop, document, and teach best practices to less experienced engineers Perform or guide physical layout, including floor planning, and simulate circuits using extracted parasitics. Perform other duties as assigned

Skills/Abilities Proficiency in integrated circuit design Understanding of integrated circuits, semiconductors, and general computer architecture Ability to write detailed design specifications Ability to manage small technical teams Excellent verbal and written communication skills Excellent mathematical skills Excellent organizational skills and attention to detail Excellent time management skills with the proven ability to meet deadlines Strong analytical and problem-solving skills Ability to prioritize tasks Demonstrate strong organization, planning, and time management skills to achieve program goals

Education Requires a bachelor’s degree in Engineering or a related field. Master's degree preferred.

Experience Requires 5-7 years of experience with a bachelor’s degree, or 3-5 years of experience with a master’s degree, or 0-2 years of experience with a PhD in ASIC Hardware Engineering or related. Additional Job Description: Applicants should possess solid skills in front-end digital systems design with experience in design flows from Cadence or Synopsys. Be fluent in SystemVerilog, Verilog or VHDL and familiar with LINT, simulation, and synthesis. Familiarity with architectures for secure systems design, e.g., cryptographic encoders/decoders or tagged processor architectures, is a plus. Demonstrated experience with successful tape-outs at advanced nodes is desired. Experience leading and managing design teams is also desired. Security Requirement: Applicants selected for this position will be required to obtain and maintain a government Secret security clearance, Compensation: $150,000 - $165,000 DOE plus full benefits Applicants must be authorized to work for any U.S. employer. Staff Smart, Inc. is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, pregnancy, sexual orientation, gender identity, national origin, age, protected veteran status, genetic information, disability status, or any other characteristic protected by law.