Company: Qualcomm India Private Limited Job Area: Engineering Group, Hardware Engineering General Summary: NUVIA is now part of Qualcomm. Our mission is to reimagine silicon and create computing platforms that will transform the industry. You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. As CPU Physical Design CAD engineer, you will build and support the world’s best implementation tools and flows. Your tools and flows will ensure our custom CPUs have industry-leading power, performance and area. Roles and Responsibilities: Develop, integrate and release new features in our high-performance place-and-route CAD flow. Architect and recommend methodology improvements to ensure our silicon has the best power, performance and area. Maintain, support and debug implementation flows, and resolve project-specific issues. Work closely with worldwide CPU physical design teams, and provide methodology guidance, tools/flows support and help achieve class-leading PPA. Work with EDA vendors to define roadmap and resolve tool issues. Preferred Qualifications: Bachelors/Masters degree in Electrical/Electronics Engineering or Computer Science. 5+ years of hands-on experience in place-and-route of high-performance chips - either in a design or CAD role. High level of proficiency in Tcl as well as Python. Experience with automation. Experience with a wide variety of Physical Design tasks - ranging all the way from place-and-route, analysis, timing sign-off and PDV. Experience with advanced technology nodes (5nm or lower). Solid understanding of digital design, timing analysis and physical verification. Strong user of industry-standard place-and-route tools such as Cadence Innovus. Proven track record of managing and regressing place-and-route flows. Additional Information: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, you can email disability-accomodations@qualcomm.com or call Qualcomm's toll-free number. Qualcomm commits to providing accessible processes and reasonable accommodations to support individuals with disabilities. All applicants must adhere to Qualcomm's policies regarding confidentiality and security. Staffing and recruiting agencies are not authorized to submit resumes or applications via this site. Qualcomm does not accept unsolicited resumes and is not responsible for fees related to such submissions. If you would like more information about this role, please contact Qualcomm Careers .

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