Position : DFT Engineer

Location: Dallas ,TX(Onsite)

Job Description: Responsible for developing, maintaining and supporting flows across all company business units and projects

Architecting methodologies and flows for an integrated, RTL centric "shift left" DFT environment across company IPs, ASICs and SoC designs. Writing and automating RTL for advanced DFT and DFD features not currently supported by the EDA vendors Developing automated verification test bench and sequence creation for DFT IP. Architecting end-2-end verification solutions from static design checks, through formal and sequence-based verification. Building IP/block and SoC level scan insertion flows and scripting ATPG retargeting procedures. Creating automated QoR checks for implementation quality control. Writing static timing constraints, creating waivers and devising flows for bullet proof timing checks