ASIC/SoC Design Verification Engineer

5 Days Old

ASIC/SoC Design Verification Engineer Role Overview: We are looking for a skilled ASIC/SoC Design Verification Engineer to join our client's team. In this role, you will work closely with architects and design engineers to establish and execute thorough test strategies for our SoC verification efforts. Your contributions will play a key role in ensuring functional accuracy, performance validation, and overall design robustness. Key Responsibilities: Partner with architects and design teams to define verification strategies, develop test plans, and document methodologies for validating SoC design verification. Set up and maintain automated verification environments to streamline testing and analysis. Develop reusable testbenches, constrained-random and directed test cases, as well as verification models for both block-level and full system validation. Establish regression methodologies, define functional coverage metrics, and address any verification gaps before design release and tape-out. Collaborate with design teams to debug simulation failures and identify root causes. Support test engineers in post-silicon validation activities. Provide mentorship to junior engineers and optimize verification processes for efficiency. Qualifications & Skills: Master's degree with 8+ years of experience or a PhD with at least 3 years of relevant expertise in Electrical Engineering, Computer Engineering, or a related discipline. Strong knowledge of UVM/OVM , assertion-based verification, semiformal verification, and co-verification methodologies involving both hardware and software. Hands-on experience in developing verification infrastructure, implementing test strategies, and achieving coverage closure. Proficiency in Verilog, SystemVerilog , scripting languages such as Python, Perl, TCL, Shell , and programming in C/C++ or SystemC . Familiarity with industry-standard protocols such as MIPI, AMBA (APB/AHB/AXI), RISC-V, ARM, or DSP architectures . Experience in verifying RTL and post-layout gate-level designs. Ability to adapt to a dynamic work environment, take ownership of tasks, and collaborate effectively in both independent and team settings. Bonus Points for Experience in: AI/ML computing, GPU, ISP architectures, or accelerator verification. Mixed-signal verification, particularly interfacing between digital and analog components. High-speed interface verification for PCIe, DDR , or similar technologies.
Employment Type: Full-time Pay Range: $150,000 - $250,000/year (DOE) Location: Fremont, CA (On-site)
Johnson Service Group (JSG) is an Equal Opportunity Employer. JSG provides equal employment opportunities to all applicants and employees without regard to race, color, religion, sex, age, sexual orientation, gender identity, national origin, disability, marital status, protected veteran status, or any other characteristic protected by law.
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Location:
Fremont, CA, United States
Job Type:
FullTime
Category:
Architecture And Engineering Occupations

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