ASICS Design Verification Engineer

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Qualcomm Technologies, Inc.
Job Area
Engineering Group, Engineering Group > ASICS Engineering
General Summary
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all.
The team is responsible for the complete verification lifecycle, from system-level concept to tape out and post-silicon support. The responsibility of the position involves comprehensive pre-silicon test planning for digital power IP's, its testbench development using the advanced verification methodology such as SystemVerilog-UVM, coverage development, assertion model development and formal verification (property checking). Learn and deploy power-aware UPF verification flow and methodology. Involve in developing automation to improve verification efficiency.
Qualifications
Bachelor's degree in Engineering, Science, or a closely related field 4+ years of experience with ASIC design and verification tools, techniques, and methodology
Preferred Qualifications
Master’s degree in Computer Science, Electrical Engineer, Computer Engineering, or a closely related field 6+ years of experience with ASIC design and verification tools, techniques, and methodology 6+ years of experience with digital design concepts and RTL languages such as SystemVerilog or Verilog, or VHDL. 6+ years of experience with computer architecture fundamentals, Object-oriented programming concepts and C or C++ programming skills. 6+ years of experience with developing block-level testbench environment using SystemVerilog 6+ years of experience with verification methodologies through coursework or past experiences such as UVM or OVM and exposure to Assertion based Formal Verification 6+ years of experience with scripting/automation skills using either Perl or python Experience with AMBA Bus protocol (AXI/AHB/APB etc) is desirable (not mandatory) Knowledge or experience with Assertion Based Formal Verification is desirable (not mandatory)
Minimum Qualifications
Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.
EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
Pay Range And Other Compensation & Benefits
$140,000.00 - $210,000.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.
3078131 Seniority level Seniority levelNot Applicable Employment type Employment typeFull-time Job function Job functionOther IndustriesTelecommunications Referrals increase your chances of interviewing at Qualcomm by 2x Get notified about new Design Verification Engineer jobs in San Diego, CA . Design Verification and Validation EngineerDesign Verification and Validation EngineerSOC Verification and Methodology EngineerMixed Signal Design Verification EngineerSOC Verification and Methodology Engineer - Sr StaffGraphics ASICS Hardware Design Engineer (San Diego/Santa Clara/Austin/Boxborough)Senior ASIC Design Verification Engineer (Security Group)Analog/Mixed-Signal Design Verification Methodology Development EngineerValidation Engineer with DDR FamiliarityNext-Gen, High-Speed Memory Subsystem ASIC Digital Design EngineerAnalog/Mixed Signal ASIC Design EngineerAnalog/Mixed Signal ASIC Design Engineer We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.
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Location:
San Diego, CA
Salary:
$200
Category:
Engineering

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